Stage: ready
![001-pmTPS-top.png](/uploads/pmTPS/001-pmTPS-top.png)
![004-pmTPS-top-v2.png](/uploads/pmTPS/004-pmTPS-top-v2.png)
Description:
pmTPS v1/v2 is a clockless PMOD(TM) interface compatible module.
pmTPS provides configurable signals routing between available PMOD(TM) ports.
pmTPS is easy configurable for UART/SPI/GPIO signal routing.
Features:
- low capacity CPLD based non-volatile signal routing configuration
- up to 5V signal IO pins tolerant
- JTAG header for configuration upload
- 8 support side LEDs for signal state indication (optional)
- standard VHDL/Verilog configurable signal routing
- 3 PMOD(TM) interface ports
Documentation:
View pinout mapping in PDF
View assembly in PDF
View schematic in PDF (v1)
View schematic in PDF (v2)
Download pin mapping in UCF
Assembly chains with this board
![assembly chain - pmBBE+pm3V3+pmTPS+pmCLK+pmUSBUART2.png](/uploads/pmTPS/assembly%20chain%20-%20pmBBE+pm3V3+pmTPS+pmCLK+pmUSBUART2.png)
![assembly chain - pmLEDDUO+pm3V3+pmTPS+pmCLK+pmUSBUART2.png](/uploads/pmTPS/assembly%20chain%20-%20pmLEDDUO+pm3V3+pmTPS+pmCLK+pmUSBUART2.png)
![assembly chain - pmMTu3V3+pm5V0+pmTPS+pm3V3+pmCLK+pmUSBUART2.png](/uploads/pmTPS/assembly%20chain%20-%20pmMTu3V3+pm5V0+pmTPS+pm3V3+pmCLK+pmUSBUART2.png)
Also, see examples
![Examples_005.jpeg](/uploads/pmTPS/Examples_005.jpeg)
![002-pmTPS-3D-left.png](/uploads/pmTPS/002-pmTPS-3D-left.png)
![002-pmTPS-3D-right.png](/uploads/pmTPS/003-pmTPS-3D-right.png)